In recent years, as the levels of integration and capacity of large scale integrated circuits (LSIs) have increased, there has been a need to continue to reduce the width of the circuit patterns of semiconductor devices. Semiconductor devices are manufactured by a reduced projection exposure apparatus called a “stepper” using original artwork patterns with a circuit pattern formed thereon, these are called masks or reticles (hereinafter referred to collectively as masks). Specifically, a pattern on a mask is transferred to the wafer by exposure to light, thereby forming circuits on to a wafer. Masks used to transfer such fine circuit patterns to the wafer are manufactured by electron beam writing apparatuses, which can write micropatterns. Further, effort has been made to develop a laser beam writing apparatus, which uses a laser beam for writing. It should be noted that electron beam apparatuses are also used to directly write a circuit pattern on a wafer.
Incidentally, since the cost to manufacture LSIs is very high, an increase in yield is required to make the manufacturing economically feasible. Meanwhile, recent representative logic devices require a pattern having a line width of several ten nano-meters. Major factors that reduce the yield include a mask containing a pattern defect and a variation in conditions of the exposure transfer. In the prior art, with the miniaturization of an LSI pattern dimension to be formed on a semiconductor wafer, mask dimensional accuracy has been improved, by the variation margin of process terms and conditions having been absorbed. Therefore, in the mask inspection, the dimension of the pattern defect is miniaturized, and a positional error of an extremely small pattern is required to be inspected. Therefore, high inspection accuracy is required of inspection apparatuses for detecting defects of masks used in LSI manufacture.
One of the factors that allow miniaturization of a mask pattern is the application of Resolution Enhancement Technology (herein after referred to as RET). In the RET technique, an auxiliary pattern referred to as an assist pattern is disposed on the side of a main pattern, whereby the formability of the main pattern is improved. Although the auxiliary pattern is not part of a transfer image, light energy entering a region of the main pattern is secured by the provision of the auxiliary pattern. In a mask inspection apparatus, such a defect of the assist pattern can also be detected.
There are two known mask defect detecting methods: the die-to-die inspection method and the die-to-database inspection method. The die-to-die inspection method is used when the mask to be inspected has thereon a plurality of identical chip patterns, or a plurality of chip patterns each including an identical pattern segment. In this method, these identical chip patterns or identical pattern segments, which are to be printed to the wafer, are compared to each other. This method permits accurate inspection using a relatively simple system configuration, since patterns on the same mask are directly compared to each other. However, this method cannot detect a defect common to both compared patterns. In the die-to-database inspection method, on the other hand, an actual pattern on a mask is compared to reference data generated from the design pattern data that was used to manufacture the mask. Thus, this method allows exact comparison of the pattern with the design pattern data, although the required system size is large since the method requires a processing system for generating a reference image. There is no choice but to use this inspection method when the mask to be inspected has only one chip pattern to be transferred to the wafer.
In die-to-die inspection, light is emitted from a light source, and the mask to be inspected is irradiated with this light through an optical system. The mask is mounted on a table, and this table is moved so that the emitted beam of light scans the surface of the mask. Light transmitted through or reflected from the mask reaches an image sensor, thereby forming an image thereon. The optical image thus formed on the image sensor is sent to a comparing unit as measurement data. The comparing unit compares the measurement data with reference data in accordance with an appropriate algorithm, and if they are not identical, the mask is determined to have a defect (see Patent Document 1).
In the prior art inspection apparatus, a mask pattern image obtained by imaging an optical image by an image sensor is determined to be correct. However, with the recent miniaturization of a device pattern on a mask, it is difficult to distinguish a difference between a shape defect of a pattern and a potentially existing shape error of a pattern. Further, the required accuracy of a linewidth or pattern of a mask increases, whereby determination as to whether or not there is a defect is difficult if the only comparison is between generated reference data based on design pattern data and a pattern image taken by an inspection apparatus.
In order to address this problem, a defect determining method has been proposed which uses the shape of the mask pattern printed on the wafer. Non-Patent Document 1 shows a method of acquiring an inspected mask image by a CCD (Charge Coupled Device), using a high-resolution optical system and a method of obtaining a wafer aerial image by using a low-resolution optical system (see, FIG. 1). In the former method, the mask image of the inspected pattern and the reference pattern is acquired by the high-resolution optical system. A wafer transfer image is estimated from the mask image through the process of FIG. 2. Thereafter, the wafer transfer images are compared with each other and defect determination is performed. Meanwhile, in the latter method, the wafer transfer image is directly collected by an optical wafer transfer device. In these methods, an image to be transferred onto a wafer is predicted, and the defect determination is performed based on the image. The latter method is also described in Non-Patent Document 2 (see, FIG. 3 and the bottom of page 3).
When a plurality of fractures and taper shaped defects occur in an assist pattern corresponding to a certain part of the main pattern on a mask, the shape of the main pattern in an estimated wafer transfer image should be in such a state that a dimensional error such as constriction of the line width occurs. That is to say, according to a determination method based on a transfer image, it can be predicted that the shape defect of a mask makes the transfer image incorrect. However, in this case, there is a problem that it cannot be indicated which of the defect portions in the assist pattern, that is, which of a plurality of fracture portions causes the constriction of the line width in the main pattern, or which combination of the plurality of fracture portions causes the constriction of the line width in the main pattern.
Patent Document 2 discloses a method for simulating a lithographic design comprised of a number of polygons arranged in a predetermined configuration. Specifically, referring to FIG. 4 of this publication, an aerial image is generated using a bitmap image available from the polygon design database (box 126), and resist modeling or simulation is performed using this aerial image (box 128). FIG. 7 shows a technique of estimating a wafer pattern aerial image by simulation of an image from a mask inspection apparatus. This technique indicates whether a wafer aerial image or a wafer image, obtained through a wafer generation process such as reaction of photoresist by light exposure, is correct.
Further, Patent Document 3 states as follows: “In any mask inspection system, the important decision to make is whether a defect will ‘print’ on the underlying photoresist in a lithography process under specified conditions.
If a mask defect does not print or have other effect on the lithography process, then the mask with the defect can still be used to provide acceptable lithography results. Therefore, one can avoid the expense in time and cost of repairing and/or replacing masks whose defects do not print.”
Patent Document 3 discloses a method of acquiring a defect area image including an image of a portion of a mask and generating a simulated image. This simulated image includes a simulation of an image which would be printed on the wafer.
As described above, according to the prior art inspection apparatus, an estimated transfer image that would be transferred to the wafer including defects acquired by the inspection apparatus can be generated.
[Patent Document 1] Japanese laid-open Patent publication No. 2008-112178
[Patent Document 2] Japanese laid-open Patent publication No. 2009-105430
[Patent Document 3] Published Japanese translation of PCT application No. 2001-516898
[Non-Patent Document 1] Carl Hess et al. (KLA-Tencor Corporation), A Novel Approach: High Resolution Inspection with a Wafer Plane Defect Detection. Prof of SPIE Vol. 7028, 70281F (2008)
[Non-Patent Document 2] Dan Ros et al. (MP-Mask Technology Center) Qualification of Aerial Image 193 nm Inspection Tool for All Masks and All Process Steps, Proc of SPIE Vol. 7028, 70282Q (2008).
In a process of determining defects, an operator checks the result indicated by a defect inspection apparatus. This process is referred to as “review process”. In the review process, for example, a device having an optical system prepared to detect a defect and a reviewing optical system is used. Further, a stage is moved to a coordinate of the defect detected in the defect inspection, and the defect portion is displayed as if seen through a microscope by means of the reviewing optical system. In this case, a sampled image of the inspection apparatus based on which the defect is identified is also aligned and displayed. By this means, the operator determines whether or not the defect detected by the defect inspection apparatus is a true defect and whether or not the defect needs to be repaired, and makes a classification.
The review screen consists of, a window, through which the reference image as the basis for the defect determination and the optical image including the defect are displayed so that the operator can compare the reference image and the optical image, and a window through which the defect distribution in the inspection range on the mask is displayed. There may be further provided a profile screen window through which a difference between the optical image and the reference image is displayed, the brightness of each pixel of the optical image and the reference image are dump displayed with numeric values, and the sensor brightness is displayed when sectioned by the x and y axes for the purpose of analyzing the defect.
Following the miniaturization of a mask pattern in recent years, the wavelength of light from a light source used for inspecting a defect can be made shorter thereby becoming ultraviolet light. When this pattern is reviewed, the pattern cannot be visually checked with visible light, and images need to be acquired with a camera using ultraviolet light. Hence, the inspection apparatus on which the reviewing optical system is not mounted is usually used to display and review an optical image including a defect, which is recorded when the defect is determined and based on which the defect is identified, and a reference image of the optical image. In this case, the inspection apparatus does not have to perform reviewing, and it is possible to browse a test result recorded in the inspection apparatus using a personal computer additionally prepared.
The review process can also be performed based on a transfer estimation image to a wafer generated from an image including the defect of a mask sampled by the inspection apparatus. That is, it is possible to indicate an optical image using the reviewing optical system, and display and review the transfer estimation image. In this case, it may be possible to review the transfer estimation image using a reviewing operation terminal prepared in addition to the inspection apparatus.
When one defect on the mask detected by the inspection apparatus leads to discovery of a plurality of defects in a transfer estimation image, it is necessary to visually check the latter defects one by one and learn the degree of influence the defect on the mask has on the transfer estimation image, and identify the defects on the mask. For example, even when the degree of defect dimensions on the mask is the same, the criticality in the transfer estimation image differs depending on the pattern site at which the defect is produced. For example, a pattern which has a narrow line width used to transmit a clock signal of LSI needing to be uniformly formed, and a pattern which has a comparatively wide line width used for a power source are taken into account. Even when the former pattern includes a defect which causes critical fluctuation in the line width, if the degree of this fluctuation is the same even for the latter pattern, the influence on the latter defect may be negligible.
The present invention has been conceived in view of the above problem. Therefore, an object of this invention is to provide an inspection apparatus and an inspection method, which can estimate a defect on a mask and the resulting influence on a wafer, and perform defect determination efficiently.
Other challenges and advantages of the present invention are apparent from the following description.